Shortcomings

Logisim's propagation algorithm is more than sophisticated enough for almost all educational purposes; but it is not sophisticated enough for industrial circuit design. In order from most damning to least damning, the shortcomings of Logisim's propagation technique include:

• Logisim cannot simulate subcircuits whose pins sometimes behave as inputs and sometimes behave as outputs. Components built using Java can have such pins, though: Within the built-in libraries, the Memory library's RAM circuit contains a D pin that acts both as an input and as an output.

• Logisim cuts off its simulation after a fixed number of iterations assuming that there is an oscillation error. Conceivably, a large circuit that does not oscillate could lead to trouble.

• Except for the issue of gate delays, Logisim does not concern itself with timing issues. In particular, it will not identify race errors, where the circuit's behavior can depend on gate delay variation or in how fast values run down wires. Consider the following ``fixed'' version of the earlier circuit that computed the AND of an input with its negation. If you were build this circuit in real life and try changing the input from 0 to 1, it could be that the Buffer gate happens to outrun the NOT gate, in which case the output would instantaneously be 1; but if the NOT gate outruns the Buffer, the output would never sway. Also, when the input changes from 1 to 0, the output could again be instantaneously 1 should the NOT gate outrun the Buffer. In Logisim's simulation, however, the values will always arrive to the AND gate simultaneously, and as a result the ouput will always be 0.

• Logisim does nothing with respect to discriminating between voltage levels: A bit can be only on, off, unspecified, or error.

• There are additional shortcomings, too, that I have omitted because they are so obscure that if you were aware of them, it would be obvious that Logisim comes nowhere close to that level. As an extreme example, I have a friend who works for a major chip manufacturer, and his job is to worry about ``bubbles'' in chips' nanometer-wide wires growing and leading to random disconnection.

• Even beyond this, I am not a circuit design specialist; thus, there may well be errors in the propagation technique of which I am not aware. I welcome corrections from experts.

Next: User's Guide.