Logisim suggestions

This is a list of possible future changes to Logisim. This attempts to enumerate most of the more interesting suggestions I've received. Being on this list does not mean that the change is certainly in Logisim's future! However, features currently planned for a particular release are notated as such. Parenthesized numbers at the end refer to requests received through SourceForge's tracker (most recently 3202627).

A. Graphical interface

  • A.1. Multiple project windows: Allow multiple windows to be open to the same project, including some way for the same circuit state to be viewed within both windows. (2890000)

  • A.2. Merge preferences/options: Merge preferences/options dialogs, so that everything is associated with the platform rather than with the currently open project. The user would have the option of designating some preferences as specific to the currently open project instead. (1596000)

  • A.3. GUI configuration with project: Save window position, open circuit, scrolling position, and tick rate as part of a project, to be restored when the project is opened again. (3100044, 3134578)

  • A.4. Automatic notification: Automatically notify users of updates to Logisim.

  • A.5. Customize shortcuts: Allow user customization of keyboard shortcuts.

B. Circuit representation

  • B.1. Component z-ordering: Support z-ordering among components in the circuit.

  • B.2. Diagonal wires: Support diagonal wires in circuits. The default will still be horizontal/vertical wires, and most users will use Logisim without ever seeing a diagonal wire. But if the user presses the shift key while adding a wire, a diagonal wire will be added.

  • B.3. Canvas extends left and up: Allow the canvas to extend indefinitely up and to the left (into what Logisim regards as negative coordinates).

  • B.4. Customized wire colors: Allow user to configure the colors used for 0/1/X/Z/multibit wires.

  • B.5. Zoom increases component detail: As you increase the zoom level, the displayed information for a component could increase. For example, zooming into a multiplexer might begin to include a label for each individual input (and use a font size that doesn't grow as quickly as the zoom factor is growing, so these additional labels fit).

  • B.6. Exploring built-in components: Allow a user to "enter" the built-in components. For instance, you could enter a multiplexer and see how it would be built using AND/OR/NOT gates (or controlled buffers). And from there you could enter an individual AND gate to see how it would correspond to transistors.

C. Circuit editing

  • C.1. Keyboard tool shortcuts: Include keyboard shortcuts for some of the more common tools. (1596000)

  • C.2. Tool attribute editing: Right now, any edit to a tool's attribute is always permanent - if you select the AND gate tool and say you wish to make a 13-input AND gate, then the next time you select the AND gate tool, it will assume you want another 13-input AND gate. Change this so the change is by default just for the component being added. You would click a button labeled "Save as Default" if you wanted those settings to be changed permanently.

  • C.3. Enter switches Edit/Text: When a component is selected and the user presses Enter, the interface changes to the Text Tool and starts editing the component's label. Pressing Enter again goes back to the Edit Tool.

  • C.4. Smarter wiring tool: The wiring tool should use the same sophisticated routing algorithm that is used for moving selected components - so a single drag of the wiring tool will find the best route from A to B, which could involve multiple turns.

  • C.5. Alt-drag duplicates selection: Make copies of a selection by dragging the selection while holding the alt or option key. (3099946)

  • C.6. Arrow keys move selection: With the Edit tool, arrow keys would move the currently selected components up/down/left/right. (3099948)

  • C.7. Export clipboard as image: When something is copied onto the clipboard, the selection should be available to be pasted into other applications as an image. (3059021).

  • C.8. Scrolling through dragging: Support scrolling through a click-and-drag interface (like Google Maps). (3087553)

  • C.9. Scroll wheel zooming: Support zooming through manipulating the scroll wheel. (3087553)

  • C.10. Layout overview: Include an overview view, which shows the full layout in miniature with a rectangle showing the region of the circuit currently being viewed, and which can be clicked to skip to a different region of the circuit. (3087553)

  • C.11. Drag to toolbar: Tools can be dragged from the toolbox into the toolbar.

  • C.12. Warning for unlabeled pins: Flag subcircuits that involve any pins that are unlabeled, perhaps by drawing them in red. Essentially, Logisim would treat unlabeled pins as a compiler warning.

  • C.13. Rewire on negation: When somebody selects or deselects the "Negate x" input on a gate, any wire connected to that input should shorten or lengthen.

  • C.14. Rewire on moved port: If somebody enters a circuit's appearance and drags a port to a different location, a circuit using that subcircuit's appearance should reroute any wires that were previously connected to that port so that it remains connected.

D. Modules

  • D.1. Subcircuit components in appearance: Allow components in a circuit to be drawn as part of the subcircuit appearance. For instance, the subcircuit might be drawn to include a value found from a probe within the subcircuit. Or a button might appear as part of the subcircuit, and pressing it corresponds to pressing a button within the subcircuit's layout. (1838087, 2988511, 3145273)

  • D.2. Copy/paste whole modules: Allow copying and pasting one or more whole modules, including the layout and appearance together.

  • D.4. Project documentation: Include way to include a documentation sheet accompanying each module in a Logisim library.

  • D.3. Customized icons: Include way to edit the icon used to represent each module. (1596284)

  • D.5. Non-circuit modules: Allow a project to include modules whose behavior is defined in ways other than a circuit layout diagram, such as a truth table (including partial truth tables with don't-cares for inputs), arithmetic expressions, a state diagram.

  • D.6. HDL modules: Allow modules in the project to be specified using Verilog/VHDL.

  • D.7. PLA modules: Allow modules to be defined as programmable logic arrays: There is a grid of wires, with input wires on the x-axis and output wires on the y-axis, and you add nodes for connecting input wires to output wires.

E. Simulation

  • E.1. Beyond 32 bits: Allow wires that carry more than 32 bits.

  • E.2. Breakpoints: Add breakpoints - for example, the user can have ticking continue until a register reaches a particular value.

  • E.3. Passive subcircuit ports: Allow passive ports into subcircuits, so that a wire connected to a subcircuit is genuinely connected into the subcircuit. This will allow a subcircuit to have a pin that is both an input and an output. And values should be passed between circuit and subcircuit without any delay. (2986864)

  • E.4. Oscilloscope: Include an oscilloscope where the user selects components (akin to the Logging module) and a graph is drawn with their values. (1904375)

F. Built-in libraries

F.a. Wiring

  • F.a.1. Stationary splitter ends: When changing a splitter's Appearance attribute, relocate the combined end, maintaining split ends' positions (instead of vice versa).

  • F.a.2. Text-oriented splitter mapping: Permit configuring splitters' bit-to-end mapping through textual form such as 0-7;8-11;12-15 (in addition to current drop-down boxes, not instead of).(3064534)

  • F.a.3. Default pin label: When pins are created, give it a default, unique label. This would make it easier to avoid sitautions where a user creates something that looks like a label but is actually a text element independent of the pin.

  • F.a.4. Multiple-wire pins: With pins, include option so that each bit in the pin has its own wire coming out. (1683159)

  • F.a.5. Radix option for pins: Configure whether multibit pins' values are displayed in binary, decimal, or hexadecimal.

  • F.a.6. Inter-circuit tunnels: Allow the insertion of tunnels that connect between different circuit layouts. (3117706)

  • F.a.7. Clock poke ticks all: Tick all clock components when a clock component is poked, rather than toggling only the clock being poked.

F.b. Gates

  • F.b.1. Reconfigure gate tools: Include a way to switch the attributes for all gate tools simultanously. This particularly would include , particularly the Gate Size and Number of Inputs attributes.

  • F.b.2. Rename controlled buffer: Rename Controlled Buffer to tri-state.

F.c. Plexers

None

F.d. Arithmetic

  • F.d.1. Custom-expression component: Have a component where the user specifies the number of inputs and outputs, and the user specifies an expression for each input. (3065893)

F.e. Memory

  • F.e.1. Memory modules: Change RAM and ROM to be modules within the project, which can be double-clicked to enter the hex editor for the memory's contents within the project. Double-clicking the memory with the Poke tool would enter the memory's contents as well (like double-clicking a subcircuit).

  • F.e.2. Top-level RAM loading: Provide a way from the top level to load from a memory image into a RAM component deep inside the subcircuit hierarchy.

  • F.e.3. Memory image file formats: Allow memory image files with other formats, such as raw binary files.

  • F.e.4. Remove in-circuit memory editing: Remove the clumsy in-layout editing features of the RAM and ROM. To change contents, users would enter the hex editor.

  • F.e.5. Resizable memory window: Allow memory components to be resized so that a larger window of memory can be seen inside the circuit.

  • F.e.6. Assembler memory: Include some way to specify an assembly language in a reasonably general way, and allow users to then load files written in that assembly language.

  • F.e.7. Multiple-read memory: Add option for RAM and ROM to support simultaneous reads (and potentially writes). This would allow the RAM component to act as a register file.

  • F.e.8. Shift register redesign: Redesign the Shift Register component. (I'm not sure exactly what the problem is, but I'm told that the design is unusually confusing.)

F.f. I/O

  • F.f.1. Toggle switch component: Add a toggle switch. It would be configurable to default to on/off, and it would have an input that would reset it to its default. (2902120, 3065891)

  • F.f.2. Keypad component: Add a keypad component.

  • F.f.3. Buzzer component: Add a buzzer component. (2902120)

  • F.f.4. ASCII character component: Add an ASCII display component similar to the hex digit display. (2902120)

  • F.f.5. File-reading component: Add a component that allows a circuit to read from a file on the host system.

  • F.f.6. File-writing component: Add a component that allows a circuit to write into a file on the host system.

  • F.f.7. Network component: Add a component supporting network communication.

  • F.f.8. Monitor component: Add a component supporting pixel-by-pixel drawing, where inputs would identify a row, column, and color, and a clock pulse would change the single identified pixel while other pixels would remain as before.

  • F.f.9. LED color input: Add an input to the LED that determines the LED's color.

  • F.f.10. LED matrix multicolor: Add something similar to the LED matrix but supporting a variety of colors.

  • F.f.11. LED matrix: Extend LED matrix to support more than 32x32 size.

  • F.f.12. LED matrix pixel size: Customize the size of each dot in the LED matrix - varying from 1 to 10 pixels.

  • F.f.13. Touchscreen component: Add something similar to the LED matrix but receiving click events (a touchscreen).

  • F.f.14. TTY extended character set: Extend the TTY to support a larger character set, perhaps including graphical characters like lines.

  • F.f.15. TTY VT100 support: Extend the TTY to support VT100 codes.

F.g. Other libraries

  • F.g.1. Shapes library: Add a library containing basically the tools that are visible when you edit a circuit appearance (line, polyline, curve, rectangle, rounded rectangle, oval, polygon).

  • F.g.2. 7400 library: Include a library including many of the standard 7400-series TTL chips, drawn as rectangles as they appear in real life.

  • F.g.3. Timing library: Add a Timing library with components like monoflops and on/off delays. (3202627)

G. Other

  • G.1. Command-line loading: In command-line execution, the user should be able to identify the specific RAM into which a memory image will be loaded (and maybe the specific Keyboard component that keyboard input will be sent to).

  • G.2. Command-line poking: Provide further ways to poke circuits through the command line, such as setting registers. (3053603)

  • G.3. Export HDL: Export circuit to Verilog/VHDL.

  • G.4. Multibit analysis: The combinational analysis module would support multibit inputs and outputs.

  • G.6. Transistor count: Compute and show a transistor count in the circuit statistics.

  • G.7. Community Web: Create Web site for users interested in sharing circuits with one another.