The CPU handles (a.), (b.), and (f.). The OS handles (c.), (d.), and (e.).

Here are four:

The OS resets the dirty bit to zero each time it loads a page into RAM, and the CPU sets the dirty bit to one each time an instruction modifies the information in the page. As a result, the dirty bit keeps track of whether the page has changed since it was loaded into RAM.

If there were no dirty bit, then when the OS decided to eject the page from RAM, it would have to assume that the page were changed, and so it would have to save the page onto disk before the RAM becomes available for other purposes. The time to save a page onto disk increases the expense of ejecting a page significantly. With the dirty bit, the OS can avoid this expense when possible.

a. Processes tend to use a small set of pages at any time, though the set of frequently-used pages migrates over time. This is served well by LRU, since the set of frequently-used pages tend always to be recently used, whereas pages that were formerly used heavily but are no longer eventually fall out of favor by LRU.

b. LRU requires that the page table be updated with every memory access to reflect that the page should now be remembered as the most recently used. This update is an additional memory access, and we would like to avoid memory accesses for efficiency's sake.

[The quote marks and period just illustrate the algorithm's process; they are not requested in the question.]

[The quote marks and period just illustrate the algorithm's process; they are not requested in the question.]

[The quote marks and period just illustrate the algorithm's process; they are not requested in the question.]

A straightforward implementation of virtual memory places the page table in memory. Unfortunately, this means that each attempt to access a memory location actually requires two memory accesses — one to look up the page table entry in virtual memory, and one to access the requested memory within the page frame given by that entry. This effectively halves the time to access each page, when compared to a system that does not use virtual memory.

Designers reduce this problem dramatically by caching a small number of frequently-used page table entries on the CPU chip, in a portion of the chip called the translation lookaside buffer, or TLB. Since accessing data stored on the CPU chip is much faster than accessing data in memory, the TLB can dramatically reduce the time for looking up page table entries, restoring a access speed more comparable to a system without virtual memory.

a. (1 + 0.01 * 30) + (1 + 0.05 * 30) = 3.8 cycles.

b. 30 + (1 + 0.05 * 30) = 32.5 cycles.

A page directory is a table of pointers to page tables for regions of virtual memory. A CPU uses the page directory instead of a single page table, because a single page table can become very large and it must be in memory in order to allow for address translation. With a page directory, the partial page tables can be paged in virtual memory. (The page directory must occupy RAM for address translation, but the page directory would be much smaller than a single exhaustive page table.) Moreover, page tables for unused regions of memory need not occupy even virtual memory.

• It provides a larger range of memory address beyond what actual memory the computer holds.
• It allows each process to have its own address space.
• It enables two processes to share the same memory easily.
• It enables memory to be moved between addresses rapidly, since altering the paging table moves the page without any actual memory copying going on.

The OS can just duplicate the process's page table, marking all pages in both processes as being read-only. When either process attempts to alter memory, the CPU will trigger a write-protection fault, and at that time the OS can duplicate the page and mark each copy as writable. Thus, the copying will only occur as pages are modified; and if the child process's memory is quickly replaced (as with execvp), it will never need to be copied.