• Logisim home page
• Guide to Being a Logisim User
  • Beginner's tutorial
    • Step 0: Orienting yourself
    • Step 1: Adding gates
    • Step 2: Adding wires
    • Step 3: Adding text
    • Step 4: Testing your circuit
  • Libraries and attributes
    • The explorer pane
    • The attribute table
    • Tool and component attributes
  • Subcircuits
    • Creating circuits
    • Using subcircuits
    • Debugging subcircuits
    • Logisim libraries
  • Wire bundles
    • Creating bundles
    • Splitters
    • Wire colors
  • Combinational analysis
    • Opening Combinational Analysis
    • Editing the truth table
    • Creating expressions
    • Generating a circuit
  • Menu reference
    • The File menu
    • The Edit menu
    • The Project menu
    • The Simulate menu
    • The Window and Help menus
  • Memory components
    • Poking memory
    • Pop-up menus and files
    • Hex editor
  • Logging
    • The Selection tab
    • The Table tab
    • The File tab
  • Application preferences
    • The Template tab
    • The Tools tab
    • The International tab
    • The Experimental tab
    • The command line
  • Project options
    • The Canvas tab
    • The Simulation tab
    • The Toolbar tab
    • The Mouse tab
  • Value propagation
    • Gate delays
    • Oscillation errors
    • Shortcomings
  • JAR libraries
    • Gray Code Incrementer
    • Library Class
    • Simple Gray Code Counter
    • Gray Code Counter
    • Guidelines
  • About the program
    • GNU General Public License
• Library Reference
  • Base library
    • Poke Tool
    • Edit Tool
    • Select Tool
    • Wiring Tool
    • Text Tool
    • Menu Tool
    • Splitter
    • Pin
    • Probe
    • Clock
    • Text
  • Gates library
    • Constant
    • NOT Gate
    • Buffer
    • AND/OR/NAND/NOR Gate
    • XOR/XNOR/Even/Odd Gate
    • Controlled Buffer/Inverter
  • Plexers library
    • Multiplexer
    • Demultiplexer
    • Decoder
    • Priority Encoder
    • Bit Selector
  • Arithmetic library
    • Adder
    • Subtractor
    • Multiplier
    • Divider
    • Negator
    • Comparator
    • Shifter
  • Memory library
    • D/T/J-K/S-R Flip-Flop
    • Register
    • Counter
    • Shift Register
    • Random
    • RAM
    • ROM
  • Input/Output library
    • Button
    • Joystick
    • Keyboard
    • LED
    • 7-Segment Display
    • Hex Digit Display
    • LED Matrix
    • TTY
  • Legacy library
    • Logisim 1.0 D/J-K Flip-Flop
    • Logisim 1.0 8-Bit Register

Random

Library:	Memory
Introduced:	2.3.0
Appearance:

Behavior

This component iterates through a pseudorandom sequence of numbers, which steps forward to the following number in the sequence each time the clock is triggered while the component is enabled. Technically speaking, the algorithm used to compute the pseudorandom sequence is a linear congruential generator: Starting from a seed r₀, the following number r₁ is the number

The next value r₂ is computed from r₁ using the same computation, and so forth. This sequence is of 48-bit numbers; the value seen from the component is the low-order bits as configured by its Data Bits attribute.

Besides the clock input, the component also includes an enable input, which leads the clock input to be ignored when enable is 0, and the reset input, which resets the register's value asynchronously to the initial seed r₀.

The initial seed is user-configurable. If it is configured at 0 (which is the default), then the seed is based on the current time; when instructed to reset through the reset input, the component starts with the same seed based on the past time. It acquires a new seed only when the entire simulation is reset.

Pins

East edge, labeled Q (output, bit width matches Data Bits attribute)

Outputs the value currently stored by the register.

West edge, top pin, labeled with a triangle (input, bit width 1)

Clock: At the instant that this is triggered as specified by the Trigger attribute, the component steps to the following number in its sequence.

West edge, bottom pin (input, bit width 1)

Enable: The component is enabled when this input is disconnected or 1; but if it is 0, then the clock input is ignored.

South edge (input, bit width 1)

Reset: When this is 1, the pseudorandom sequence asynchronously resets to its initial seed.

Attributes

Data Bits

The bit width of the value emitted by the component.

Seed

The starting value used for the pseudorandom sequence. If this is 0 (the default), then the starting value is based on the time that the current simulation began.

Trigger

Configures how the clock input is interpreted. The value rising edge indicates that the register should update its value at the instant when the clock rises from 0 to 1. The falling edge value indicates that it should update at the instant the clock falls from 1 to 0.

Label

The text within the label associated with the component.

Label Font

The font with which to render the label.

Poke Tool Behavior

None.

Text Tool Behavior

Allows the label associated with the component to be edited.

Back to Library Reference