Logisim 1.0 D/J-K Flip-Flop
| Bibliothek: | Legacy |
| Eingeführt: | 2.0 Beta 12 |
| Aussehen: |  |
Verhalten
These components exist only for backwards compatibility with Logisim 1.0X; for new circuits, the Memory library's flip-flops are recommended instead.
Each flip-flop stores a single bit of data, which is emitted through the Q output on the east side. Normally, the value can be controlled via the inputs to the west side. In particular, the value changes when the clock input, marked by a triangle on each flip-flop, rises from 0 to 1; on this rising edge, the value changes according to the corresponding table below.
| D Flip-Flop | J-K Flip-Flop | |||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
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- D Flip-Flop: When the clock rises from 0 to 1, the value remembered by the flip-flop becomes the value of the D input (Data) at that instant.
J-K Flip-Flop: When the clock rises from 0 to 1, the value remembered by the flip-flop toggles if the J and K inputs are both 1 and the value remains the same if both are 0; if they are different, then the value becomes 1 if the J (Jump) input is 1 and 0 if the K (Kill) input is 1.
Pins
- West edge, marked by triangle (input, bit width 1)
- Clock input: At the instant that this input value switches from 0 to 1 (the rising edge), the value will be updated according to the other inputs on the west edge. As long as this remains 0 or 1, the other inputs on the west edge have no effect.
- West edge, other labeled pin(s) (input(s), bit width 1)
- These inputs control how the flip-flop's value changes during the rising edge of the clock. Their exact behavior depends on the flip-flop; the above tables summarize their behavior.
- East edge, labeled Q, north end (output, bit width 1)
- Outputs the value currently stored by the flip-flop.
- East edge, south end (output, bit width 1)
- Outputs the complement of the value currently stored by the flip-flop.
Attribute
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